With the rapid development of semiconductor manufacturing technology, semiconductor devices have been developed for higher component density and higher degree of integration. Transistors, as the basic semiconductor devices, are currently being widely used. With the improvement of the component density and integration degree of the semiconductor devices, the gate sizes of planar transistors are getting shorter. Thus the traditional planar transistors may have a weakened control ability to the channel current, resulting in short-channel effects which can generate leakage current. Ultimately, electrical properties of the semiconductor devices can be affected.
In order to overcome the short channel effect and to eliminate the transistor leakage current, the fin field-effect transistor (Fin FET) is proposed. Fin FET is a common multi-gate devices. The structure of a Fin FET can include: a fin portion on the surface of a semiconductor substrate, a dielectric layer covering the surface of the semiconductor substrate and a part of the sidewalls of the fin portion, a gate structure on the surfaces of the dielectric layer as well as the top and sidewalls of the fin portion, and a source region and a drain region that are located in the fin portion on two sides of the gate structure.
However, as the dimensions of semiconductor devices continually decrease, the Fin FET manufacturing process has been challenged. It is difficult to ensure a stable performance of the Fin FET.